Mentor Graphics and Xilinx Team Up to Boost Productivity for Xilinx ISE Software Users
WILSONVILLE, Ore. & SAN JOSE, Calif.--(BUSINESS WIRE)-- Aug. 27,
2001--Mentor Graphics Corporation (Nasdaq:MENT) and Xilinx, Inc. today
announced extensive tool integration from Mentor Graphics for the
Xilinx® Integrated Software Environment (ISE)(TM) 4.1. With this
collaboration, designers now have access to a comprehensive FPGA
design suite that includes capture, simulation, synthesis, management
and timing analysis integrated with Xilinx ISE implementation tools,
accelerating the creation of complex FPGA designs.
``The ISE software has been built to support the design of very
complex Programmable Logic Devices -- like our Virtex-II Platform
FPGAs with densities as large as ten-million system gates,'' said Rich
Sevcik, senior vice president and general manager, Xilinx, Inc.
``Designing devices of this magnitude requires a design solution that
features tight integration between EDA tools and our industry-leading
ISE product with its best-in-class timing-driven place and route
capabilities. Our partnership with Mentor Graphics enables us to
support a complete front-to-back design flow that yields a substantial
time-to-market advantage for our customers.''
``Mentor Graphics is committed to providing designers with the
best, most comprehensive tool suite available for complex FPGA design.
Our product development teams work in 'technology lockstep' with
Xilinx to provide software integration and performance enhancements in
close coordination with new hardware availability,'' said Anne
Sanquini, vice president and general manager of the HDL Design
division at Mentor Graphics. ``Our commitment to the FPGA market is
underscored by the depth and breadth of our product support for the
new Xilinx ISE package.''
ISE Integration for Synthesis and Simulation Tools
Xilinx and Mentor Graphics have teamed up to provide seamless
integration of the Mentor Graphics® LeonardoSpectrum(TM) version
2001.1D synthesis solution and Mentor's ModelSim® version 5.5
simulation products into Xilinx ISE. This integration effort ensures
seamless operation of Mentor's world-class solutions for customers who
prefer the Xilinx design environment.
Mentor's LeonardoSpectrum version 2001.1D synthesis solution
contains optimization enhancements that drive higher quality of
results, including Automatic Inference. Unique to LeonardoSpectrum,
Automatic Inference detects memories from the RTL code and builds in
the designer's choice of distributed or block RAM. For Virtex series
designers, this new functionality eliminates the need to manually
instantiate RAMs, ROMs and FIFOs in the RTL code, providing
substantially faster implementation and verification flows.
Mentor's ModelSim simulation tool delivers ASIC class RTL and
timing simulation performance for advanced programmable logic
designers. Along with performance improvements, the 5.5 release of
ModelSim includes improved integration with Xilinx ISE. Xilinx
designers now have a faster path from concept to Verilog or VHDL with
a new FPGA library wizard and the improved Project Manager tool.
Complete Flow to Take Designers from Concept to Silicon
Mentor Graphics offers a complete design environment that fully
automates the entire programmable logic design flow. The FPGA
Advantage® solution has been enhanced to support seamless
integration with Xilinx world class timing-driven place and route
tools. Mentor then makes it easy to integrate the FPGA into the board
level design by enabling board-level verification with the Tau®
board-level static timing analysis tool. Highlights include:
- FPGA Advantage design flow integration. FPGA Advantage offers
Xilinx designers a complete FPGA design solution, including
capture, simulation, synthesis, and management. This flow
contains all of the new features described above for
LeonardoSpectrum and ModelSim, and provides value to Xilinx
designers in the areas of team design, ease of use, and
overall faster time to silicon.
- Tau board-level timing tool integration. ISE designers can
export chip component-level timing information via a STAMP
model directly into Tau to perform timing analysis. Tau
provides exhaustive worst-case timing analysis and
verification at the board level, and eliminates false
violations reported in standard board static timing tools. Tau
can also drive timing requirements directly to board layout,
ensuring that complex FPGAs work at the board level. The ISE
integration also enables designers to take advantage of new
features in Tau, including improved graphical feedback during
analysis.
About Xilinx, Inc.
Xilinx is the leading innovator of complete programmable logic
solutions, including advanced integrated circuits, software design
tools, predefined system functions delivered as intellectual property
cores, and unparalleled field engineering support. Founded in 1984 and
headquartered in San Jose, Calif., Xilinx invented the field
programmable gate array (FPGA) and fulfills more than half of the
world demand for these devices today. Xilinx solutions enable
customers to reduce significantly the time required to develop
products for the computer, peripheral, telecommunications, networking,
industrial control, instrumentation, high-reliability/military, and
consumer markets. For more information, visit the Xilinx web site at
www.xilinx.com.
About Mentor Graphics Corp.
Mentor Graphics Corporation (Nasdaq:MENT) is a world leader in
electronic hardware and software design solutions, providing products,
consulting services and award-winning support for the world's most
successful electronics and semiconductor companies. Established in
1981, the company reported revenues over the last 12 months of more
than $600 million and employs approximately 2,975 people worldwide.
Corporate headquarters are located at 8005 S.W. Boeckman Road,
Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are
located at 1001 Ridder Park Drive, San Jose, California 95131-2314.
World Wide Web site: www.mentor.com.
Mentor Graphics, ModelSim, Tau and FPGA Advantage are registered
trademarks of Mentor Graphics Corporation. LeonardoSpectrum is a
trademark of Mentor Graphics Corporation. All other company or product
names are the registered trademarks or trademarks of their respective
owners.
Contact:
Mentor Graphics
Amy Malagamba, 503/685-7836
amy_malagamba@mentor.com
or
Xilinx
Ann Duft, 408/559-7778
ann_duft@xilinx.com
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